Worst-Case Timing Analysis

Model-based worst-case timing analysis of safety-critical embedded systems. Verification of system and software architectural design.

For software architects and functional safety engineers.


Detect Timing Bottlenecks and Violations Earlier

chronVAL allows you to analyze the real-time capability of safety-critical embedded systems using formal verification methods. Using an integrated software and hardware model, chronVAL calculates best and worst-case response times, preemption times, end-to-end latencies, and resource utilization.

Sensitivity analysis detects timing bottlenecks and sporadic violations, reducing the overhead of time-consuming implementations, integrations, and testing. Thus, for engineers and architects, chronVAL is a critical tool for assessing and optimizing design robustness and scalability.


Understanding the Effects of Clock Drift and Asynchronicity


Design Space Exploration and Optimization


Verification of Timing and Performance Requirements


End-To-End Analysis of Distributed Functions in Vehicle Networks

Key Features

  • Schedulability analysis
  • Analysis of best- and worst-case timing behavior
  • End-to-end analysis of event chains
  • Virtual integration of distributed multicore systems
  • Analysis of communication latencies
  • Analysis of time synchronization and drifting clock effects
  • Calculation of available and remaining capacities in time intervals
  • Sensitivity analysis
  • Verification of timing and performance requirements

Event Spectrum

Response Time Composition

End-to-End Response Times

“The feasibility of change requests can now be analyzed in 1/3 of the usual time. This makes us more agile and saves money, enables us to respond promptly to our customers, and delivers more confidence in the end solution.”

Andreas Wolfram, Continental
Team Lead Software

Selected Customers